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Soc Design Engineer Jobs
Company | INTEL |
Address | , Santa Clara |
Employment type | FULL_TIME |
Salary | $88,320 - $132,660 a year |
Expires | 2023-10-22 |
Posted at | 9 months ago |
You will be part of the Mixed Signal IP Development team chartered to deliver General-Purpose Input/Output (GPIO) IP on Intel technology.
Your responsibilities will include but are not limited to:
- Work closely with foundry customers to verify the functionality, performance, and reliability of GPIO IP in their specific designs.
- Architect and design GPIO IP tailored to meet the specific needs of foundry customers optimized for Intel process technologies and design rules.
- Stay updated on the latest advancements in technology and design methodologies.
- Perform rigorous testing, simulation, and characterization to ensure the GPIO IP meets the required specifications.
- Leverage this knowledge to optimize GPIO IP designs for PPA, identify potential areas for improvement, and propose innovative solutions to foundry customers.
- Prepare comprehensive documentation and guidelines to assist foundry customers in successfully utilizing GPIO IP.
This is an entry level position and compensation will be given accordingly.
#DesignEnablement
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
- Candidate must possess a Bachelor's degree with 3+ months of experience or MS degree with 6+ months of experience in Electrical or Computer Engineering or a related field .
6+ months experience in the following:
- Design tool in mixed signal environment, spice simulation models, reliability tools and reliability analysis.
Preferred Qualifications:
6+ months experience in analog circuits.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
Other Locations
US, AZ, Phoenix; US, CA, Santa Clara
Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in US, California: $88,320.00-$132,660.00
- Salary range dependent on a number of factors including location and experience
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
JobType
Hybrid
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