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Asic Design Engineer Lead Jobs

Staff Digital Asic Design Engineer
By Gyga Force At Alameda County, CA, United States
Education: MSEE with 5+ years of experience, or PhD with 2+ years of experience.
Work with analog and system IC designers to define digital component requirements.
Execute full digital flow, from functional requirements to layout, and eventually tape-out.
Experience developing digital IP interfacing with analog circuits (LDOs, ADCs, DACs, PLLs, OSCs).
Experience in low power digital design and power gating of digital blocks.
Experience in event-driven modeling of analog circuits for full-chip verification.
Asic Design Engineer Jobs
By Apple At Cupertino, CA, United States

Summary Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your ...

Asic System Engineer Jobs
By Quality Theorem At Redmond, WA, United States
Manage licenses and ensure that they are properly configured and utilized
Install, configure, and maintain ASIC design tools, such as Synopsys, Cadence, and Mentor Graphics tools
Ensure customer tools are available and functioning optimally, and work closely with the engineering team to troubleshoot any issues that arise
Monitor system performance and troubleshoot any issues that arise
Develop and maintain scripts and tools to automate tasks and improve system efficiency
Maintain documentation on the installation, configuration, and use of our ASIC design tools
Lead Turbine Design Engineer
By GE Renewable Energy At Greenwood Village, CO, United States
Strong written and verbal communication skills, experienced in creating and presenting technical reports and responding to clients’ technical questions
Strong sense of urgency and ability to identify and manage technical risks
Ability to understand and communicate customer requirements
Plan and follow project engineering basic design phase and coordinate with Hydraulic de
Engineering degree or equivalent including power systems and power electronics subjects
Able to work to deadlines under pressure whilst maintaining the safety, quality and engineering integrity of the solution
Asic Design Verification Engineer
By Samaritan Technical Professionals At United States
Experience in one or more Verification language (UVM, System Verilog)
Experience in one or more scripting language (TCL, Python, Perl, Shell-scripting)
Prior experience validating complex SoCs that include multiple clock and reset domains, clock gating, and power intent specified via UPF
6+ years of verification experience
Have the freedom to work remotely!
Participate in development of test benches to verify RTL at block, unit, and SoC levels
Lead Optical Engineer (Lens Design)
By KLA At , Milpitas, 95035, Ca $125,100 - $212,700 a year
Translate system or subsystem requirements into optical design and manufacturing requirements.
Working knowledge with diverse optical devices and components: objectives, collimation and relay optics, fibers, cameras and detectors.
Highly desired to have more than 10 years of professional experience in high precision optical system development, preferably in semiconductor tools
Experience of working with top tier optical suppliers to develop high precision optics and optical assembly
Ability to establish and maintain cooperative working relationships with manager, co-workers and customer.
Investigate different design options and finding the best option through evaluating tolerances, manufacturability, light budgets and other trade-offs.
Asic Technical Lead Jobs
By SEMIFIVE At San Jose, CA, United States
Project planning, Coordination and Program Management experience of ASIC and design is a plus
Collaborate with HQ PMO (Project Management Office) and Engineering teams in establishing project engineering milestones.
Engage with customer technical teams and decision makers to understand their ASIC requirements.
Minimum 10+ years of hands-on ASIC physical design experience from RTL synthesis to GDS2.
Experience in block-level and top-level physical design
Experience with FinFET ASIC designs. Recent experience in 7nm/5nm/4nm is a plus.
Entry Asic Design Engineer
By HP At , Vancouver, 98683, Wa
Familiar with code base management - subversion, git, GitHub, etc.
Knowledge of design and programming languages: Verilog, System Verilog, Python, Perl, C, C++, etc.
Ability to apply analytical and problem-solving skills.
Good written and verbal communication skills.
Working knowledge of electronic components, PCA designs and use of test equipment.
Experience with Xilinx FPGA design, compilation, and implementation is a plus.
Asic Design Engineer, Entry Level
By NXP Semiconductors At , San Jose, 95134, Ca
Up to 2 years work experience, including internships
Experience in micro-architecture design, RTL coding, and functional verification
Good understanding of synchronous/asynchronous design, and timing requirements for complex IP modules
Experience in Verilog HDL and Verilog design tools (Synopsys VCS, Verdi or similar) is required
Working knowledge of binary number format and its operation is required
Experience in system Verilog is a plus
Electromagnetic Pump Design Lead Engineer (Remote Eligible, U.s.)
By GE Power Portfolio At , Remote $86,000 - $119,000 a year
Maintain change and configuration management for technical documents.
4 years of experience working knowledge of mechanical design principles, fluid mechanics, electro-magnetics, electro-dynamics, or material science.
Experience with functional, performance, margin and qualification [environmental, seismic] testing methods.
Prepare requirements for the electric power supply.
Responsible for development of the component / system requirements and specifications.
Ensure design meets all requirements.
Asic Eda Tool Software Qa Engineer
By INTEL At , Hillsboro, Or $102,540 - $153,580 a year
Linux environment capabilities and Python scripting skills.
Experience with or knowledge of:
ASIC Test case generation skills.
Salary range dependent on a number of factors including location and experience
1+ years of experience in the following:
Executing and enhancing QA methods for ASIC Design Kit collateral and design flows.
Asic Eda Tool Software Qa Engineer
By INTEL At , Phoenix, Az $102,540 - $153,580 a year
Linux environment capabilities and Python scripting skills.
Experience with or knowledge of:
ASIC Test case generation skills.
Salary range dependent on a number of factors including location and experience
1+ years of experience in the following:
Executing and enhancing QA methods for ASIC Design Kit collateral and design flows.
Asic Design Engineer Jobs
By INTEL At , Remote
5+ years of experience with RTL (Verilog, SystemVerilog, VHDL), Synthesis (using Design Compiler), Static Timing Analysis (using PrimeTime)
2+ years of experience using Spyglass including clock domain crossing (CDC) analysis
Experience in Design Verification (DV) using standard simulators (e.g. VCS, QuestaSim, NCSim
Experience with IP (DDR5/4/3, PCIe, Ethernet) integration is a plus
Experience with host interconnects (Amba, Avalon) is a plus
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
Asic Test Engineer, Annapurna Silicon Operations
By Annapurna Labs (U.S.) Inc. At , Austin, Tx
2+ years of experience in C/C++ and/or Microsoft VBA/VBT and terminal shell environments
Experience with JMP, Optimal plus.
Bachelor's In Electrical engineering or Computer Science
2+ years on Advantest 93K, Teradyne IGXL based testers or other system level testers
Hardware development for probe, final test, system level test.
Software development for each insert

Are you an experienced ASIC Design Engineer looking to take the lead on innovative projects? We are looking for a talented individual to join our team and help us create cutting-edge ASIC designs. You will have the opportunity to work on the latest technologies and collaborate with a team of experts to develop the best solutions. If you are ready to take your career to the next level, this is the perfect opportunity for you!

Overview Asic Design Engineer Lead is responsible for leading the design and development of integrated circuit (IC) designs for a variety of applications. The Lead will be responsible for the overall design process, from concept to production, and will be responsible for ensuring that the design meets all customer requirements. Detailed Job Description
• Lead the design and development of integrated circuit (IC) designs for a variety of applications.
• Develop and maintain design specifications, test plans, and other design documentation.
• Work with other engineering teams to ensure that the design meets all customer requirements.
• Develop and maintain design databases and libraries.
• Develop and maintain design tools and scripts.
• Develop and maintain design flows and processes.
• Develop and maintain design verification plans.
• Develop and maintain design verification test benches.
• Develop and maintain design verification test results.
• Develop and maintain design optimization plans.
• Develop and maintain design optimization test benches.
• Develop and maintain design optimization test results.
• Develop and maintain design synthesis plans.
• Develop and maintain design synthesis test benches.
• Develop and maintain design synthesis test results.
• Develop and maintain design layout plans.
• Develop and maintain design layout test benches.
• Develop and maintain design layout test results.
• Develop and maintain design verification plans.
• Develop and maintain design verification test benches.
• Develop and maintain design verification test results.
• Develop and maintain design optimization plans.
• Develop and maintain design optimization test benches.
• Develop and maintain design optimization test results.
• Develop and maintain design synthesis plans.
• Develop and maintain design synthesis test benches.
• Develop and maintain design synthesis test results.
• Develop and maintain design layout plans.
• Develop and maintain design layout test benches.
• Develop and maintain design layout test results.
• Develop and maintain design verification plans.
• Develop and maintain design verification test benches.
• Develop and maintain design verification test results.
• Develop and maintain design optimization plans.
• Develop and maintain design optimization test benches.
• Develop and maintain design optimization test results.
• Develop and maintain design synthesis plans.
• Develop and maintain design synthesis test benches.
• Develop and maintain design synthesis test results.
• Develop and maintain design layout plans.
• Develop and maintain design layout test benches.
• Develop and maintain design layout test results.
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