Coherent Mesh Design Verification Engineer Jobs

Entry level positions: 0-2 years of experience

Senior and above level positions: a minimum of 2 years of experience

Experience in debugging designs of IP level (Wi-Fi Baseband, and MAC) or SOC level

Good communication and documentation skills

Work with system architects, algorithm engineers, and RTL designers to define Wi-Fi AP chip verification requirements.

MS or higher degree in EE, CS or related fields,

Define requirements for block and subsystem level testing infrastructure.

4+ years of hardware verification experience

Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools

Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM

Programming experience in languages common to the industry (e.g., C, C++, Perl, Python)

Experience in automating design, verification, and validation tasks