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Senior System Validation Engineer
Company | INTEL |
Address | , Hillsboro |
Employment type | FULL_TIME |
Salary | |
Expires | 2023-10-17 |
Posted at | 8 months ago |
The Data Center Platform Architecture Integration and Validation (PAIV) group is looking for a Senior System Validation Engineer with expertise in Power Management and Reset domain to join their dynamic and growing team. You will bring your broad understanding of multiple system areas and interfaces with Architecture, Design, and pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on die debug features. The scope of the deliverable will vary based on the target platform and specific issue at hand. Hence you will need a solid big picture understanding across the whole system. In this role, you will be responsible for: test strategy, test planning, leading validation, enabling, and debugging current and upcoming Power Management and system issues on leading server products. Create, define, and develop system validation environment and test suites, use, and apply emulation and platform level tools and techniques to ensure meeting expectations to desire spec, development of methodologies, validation plans, and leading debug failures and mentoring engineers in the team.
The candidate should exhibit the following behavioral traits:
Strong problem-solving skills.
Multitasking skills.
Strong written and verbal communication skills.
Proficient to work in a dynamic and team-oriented environment.
Good networking, communication, and influencing skills.
Excellent track record of team skills and collaboration skills.
Technical expertise in in the following:
Silicon or platform validation and debug.
BIOS or Firmware Debug.
Scripting experience.
Qualifications
Qualifications:
An eligible candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidate.
Minimum Qualifications:
Bachelors of Science degree in Electrical/Computer with 7+ years of relevant experience
OR - Master of Science degree in Electrical/Computer with 5+ years of relevant experience
OR - PhD in Electrical/Computer with 2+ years of relevant experience
Preferred Qualifications:
Reset experience.
Platform RAPL/Cstate/Pstate/sleep states knowledge.
Server Architecture.
FPGA or SoC verification.
Linux Kernel debug.
Test plan and test development experience.
Experience in automation and test/integration methodologies.
Experience in developing validation methodologies.
Familiarity with datacenter deployment challenges and solutions, software development practices, silicon debug, profiling and other analysis and testing techniques is strongly preferred.
Inside this Business Group
The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
JobType
Hybrid
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